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Publications (10 of 198) Show all publications
Mobaiyen, S., Sjödin, M. & Mubeen, S. (2026). Cross-Partition Memory Interference in Software-Partitioned GPUs for Real-Time Tasks. In: Proceedings of the IEEE International Conference on Industrial Technology: . Paper presented at 2026 IEEE International Conference on Industrial Technology, ICIT 2026, 4-6 March, 2026, Monterrey, Mexico. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Cross-Partition Memory Interference in Software-Partitioned GPUs for Real-Time Tasks
2026 (English)In: Proceedings of the IEEE International Conference on Industrial Technology, Institute of Electrical and Electronics Engineers (IEEE) , 2026Conference paper, Published paper (Refereed)
Abstract [en]

Modern GPUs offer high computational throughput but are not designed to ensure spatial or temporal isolation between concurrent tasks. Only a few server-grade devices with multi-instance GPU technology support true hardware partitioning. As consumer and embedded GPUs now include many Streaming Multiprocessors (SMs), running multiple tasks concurrently has become common to improve utilization. Softwarebased SM-level spatial partitioning, where each partition is restricted to a fixed set of SMs, offers a simple and portable way to isolate concurrent tasks. Although in this method SMs are isolated, resources such as the L2 cache and DRAM remain shared, causing memory interference that can affect execution times and lead to timing unpredictability, often overlooked in real-time analysis. This paper empirically characterizes cross-partition interference on a COTS GPU under software-only SM-level partitioning. Using a mix of compute- and memory-intensive tasks, partitioned and non-partitioned configurations are compared by measuring both end-to-end response times and GPU execution times. The results indicate that SM-level partitioning largely confines interference for compute-bound tasks. However, memory-bound tasks continue to cause substantial interference across partitions, increasing the task execution time by as much as twofold. These findings indicate that memory interference is a critical challenge for achieving timing predictability in real-time GPU-based cyber-physical systems, underscoring the need to address memory interference to achieve predictable performance.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2026
Series
Proceedings of the IEEE International Conference on Industrial Technology, ISSN 2641-0184
Keywords
GPU multitasking, GPU partitioning, Memory interference, Real-time systems, Resource isolation, Cache memory, Computer graphics equipment, Dynamic random access storage, Embedded systems, Graphics processing unit, Interactive computer systems, Memory architecture, Multitasking, Program processors, Concurrent tasks, Memory interferences, Real - Time system, Real-time tasks, Spatial isolation, Streaming multiprocessors, Temporal isolation, Real time systems
National Category
Computer Engineering
Identifiers
urn:nbn:se:mdh:diva-77540 (URN)10.1109/ICIT64854.2026.11490122 (DOI)2-s2.0-105038464819 (Scopus ID)9798331598754 (ISBN)
Conference
2026 IEEE International Conference on Industrial Technology, ICIT 2026, 4-6 March, 2026, Monterrey, Mexico
Available from: 2026-06-11 Created: 2026-06-11 Last updated: 2026-06-11Bibliographically approved
Bujosa, D., Craciunas, S. S. & Mubeen, S. (2026). Efficient AVB-aware Scheduling for Critical Traffic in Time-sensitive Networks. In: Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS: . Paper presented at 32nd IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2026, Saint Malo, Frankrike, 12-14 May 2026 (pp. 27-40). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Efficient AVB-aware Scheduling for Critical Traffic in Time-sensitive Networks
2026 (English)In: Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS, Institute of Electrical and Electronics Engineers (IEEE) , 2026, p. 27-40Conference paper, Published paper (Refereed)
Abstract [en]

Time-Sensitive Networking (TSN) enables deterministic mixed-criticality communication over standard Ethernet through time-aware scheduling (IEEE 802.1Qbv) for Scheduled Traffic (ST) and via Credit-Based Shaping (CBS) for Audio-Video Bridging (AVB) traffic. Existing scheduling methods often prioritize ST schedules and require iterative feedback loops between ST-schedule generation and AVB schedulability analysis to ensure the timing of both classes. We propose a novel approach called EAST (Efficient AVB-aware Scheduling for TSN) that improves runtime and schedulability by introducing a constraint-driven approach that decouples AVB analysis from ST schedule synthesis. We first perform a Worst-Case Response Time (WCRT) analysis to determine the maximum ST interference each AVB stream can tolerate without missing its deadline. This interference bound is then translated into temporal constraints on the ST scheduler, ensuring that both ST and AVB traffic remain schedulable without requiring multiple iterations of generating ST schedules and checking AVB schedulability. The resulting formulation guarantees end-to-end latency bounds for both ST and AVB streams while drastically reducing schedule synthesis time. Synthetic and real-world test cases show that EAST reduces runtime by several orders of magnitude compared to prior methods, while maintaining or improving overall schedulability.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2026
Series
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS, ISSN 1545-3421
Keywords
Ethernet, IEEE Standards, Signal processing, Telecommunication traffic, Audio videos, Critical traffic, Deterministics, Feedback loops, Mixed criticalities, Runtimes, Schedulability, Scheduled traffics, Scheduling methods, Traffic videos, Iterative methods
National Category
Computer Systems
Identifiers
urn:nbn:se:mdh:diva-78564 (URN)10.1109/RTAS68450.2026.00010 (DOI)2-s2.0-105042858663 (Scopus ID)9798331580704 (ISBN)
Conference
32nd IEEE Real-Time and Embedded Technology and Applications Symposium, RTAS 2026, Saint Malo, Frankrike, 12-14 May 2026
Available from: 2026-07-09 Created: 2026-07-09 Last updated: 2026-07-09Bibliographically approved
Ekrad, K., Johansson, B., Alvarez Vadillo, I., Mubeen, S. & Ashjaei, S. M. (2026). Timing‑Aware Configuration Framework for TSN and OPC UA in Industrial Automation Systems. In: : . Paper presented at 29th International Symposium on Real-Time Distributed Computing.
Open this publication in new window or tab >>Timing‑Aware Configuration Framework for TSN and OPC UA in Industrial Automation Systems
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2026 (English)Conference paper, Published paper (Refereed)
Abstract [en]

The convergence of OPC UA Publish–Subscribe (PubSub) and Time-Sensitive Networking (TSN) enables vendor-agnostic and predictable communication in real-time distributed industrial automation systems. Deploying such systems, however, requires consistent configuration across application and network layers that currently expose mismatched timing abstractions. TSN depends on precise traffic specifications, while OPC UA PubSub provides extensive configuration options without guidance on selecting timing-related parameters, creating engineering complexity and increasing commissioning effort. To address this challenge, this paper presents TPConf, a tool-supported framework that co-configures OPC UA PubSub and TSN from traffic specifications by classifying application requirements into industrial automation traffic classes, mapping them to TSN classes (ST, AVB, BE), and deriving corresponding PubSub parameters. TPConf further generates ready-to-compile publisher code for open62541, and an industrial use case with diverse simulated flows demonstrates the automated co-configuration workflow. By unifying application and network configuration, TPConf reduces engineering effort and supports predictable and scalable OPC UA over TSN deployments in real-time automation systems.

Keywords
OPC UA, TSN, PubSub, Network Configuration
National Category
Computer and Information Sciences Computer Sciences Networked, Parallel and Distributed Computing
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-76343 (URN)
Conference
29th International Symposium on Real-Time Distributed Computing
Projects
SEINE
Available from: 2026-03-26 Created: 2026-03-26 Last updated: 2026-03-30Bibliographically approved
Ekrad, K., Johansson, B., Alvarez Vadillo, I., Mubeen, S. & Ashjaei, S. M. (2026). Traffic-Aware Configuration of OPC UA PubSub in Industrial Automation Networks. In: IEEE (Ed.), IEEE International Conference on Industrial Technology (ICIT 2026): . Paper presented at IEEE International Conference on Industrial Technology (ICIT 2026), 4-6 March, 2026, Monterrey, Mexico. Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>Traffic-Aware Configuration of OPC UA PubSub in Industrial Automation Networks
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2026 (English)In: IEEE International Conference on Industrial Technology (ICIT 2026) / [ed] IEEE, Institute of Electrical and Electronics Engineers (IEEE) , 2026Conference paper, Published paper (Refereed)
Abstract [en]

Interoperability across industrial automation systems is a cornerstone of Industry 4.0. To address this need, the OPC Unified Architecture (OPC UA) Publish-Subscribe (PubSub) model offers a promising mechanism for enabling efficient communication among heterogeneous devices. PubSub facilitates resource sharing and communication configuration between devices, but it lacks clear guidelines for mapping diverse industrial traffic types to appropriate PubSub configurations. This gap can lead to misconfigurations that degrade network performance and compromise real-time requirements. This paper proposes a set of guidelines for mapping industrial traffic types, based on their timing and quality-of-service specifications, to OPC UA PubSub configurations. The goal is to ensure predictable communication and support real-time performance in industrial networks. The proposed guidelines are evaluated through an industrial use case that demonstrates the impact of incorrect configuration on latency and throughput. The results underline the importance of traffic-aware PubSub configuration for achieving interoperability in Industry 4.0 systems.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2026
Series
IEEE International Conference on Industrial Technology (ICIT), ISSN 2641-0184, E-ISSN 2643-2978
Keywords
OPC UA, TSN, PubSub Configuration
National Category
Computer and Information Sciences Networked, Parallel and Distributed Computing
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-76234 (URN)10.1109/ICIT64854.2026.11491572 (DOI)2-s2.0-105038469408 (Scopus ID)979-8-3315-9875-4 (ISBN)979-8-3315-9876-1 (ISBN)
Conference
IEEE International Conference on Industrial Technology (ICIT 2026), 4-6 March, 2026, Monterrey, Mexico
Projects
SEINE
Available from: 2026-03-13 Created: 2026-03-13 Last updated: 2026-06-11Bibliographically approved
Ekrad, K., Alvarez Vadillo, I., Johansson, B., Mubeen, S. & Ashjaei, S. M. (2025). A Methodology to Map Industrial Automation Traffic to TSN Traffic Classes. In: 30th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA): . Paper presented at 30th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>A Methodology to Map Industrial Automation Traffic to TSN Traffic Classes
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2025 (English)In: 30th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA), Institute of Electrical and Electronics Engineers (IEEE) , 2025Conference paper, Published paper (Refereed)
Abstract [en]

This paper identifies that existing industrial automation standards, such as IEC/IEEE 60802 and IEEE 802.1Q, often have inconsistent definitions of traffic types. In the context of utilizing time-sensitive networking (TSN) standards for future automation systems, clear and consistent traffic characteristics and use cases should be defined to benefit from TSN features. Besides that, to facilitate the integration of TSN into the automation systems, the current standards provide a recommendation for mapping the automation traffic to the TSN traffic classes. In this paper, we propose an alternative mapping methodology for automation traffic to TSN traffic classes after presenting the existing automation traffic and their characteristics. Finally, through a case study, we show the potential of the new mapping methodology compared to the standard mapping strategy.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2025
Series
IEEE Conference on Emerging Technologies and Factory Automation, ISSN 1946-0759
Keywords
Automation;Industrial communication;Standards;Manufacturing automation;Traffic Mapping;Time-Sensitive Networking (TSN);Industrial Communication;Industrial automation
National Category
Computer and Information Sciences Computer Engineering Computer Sciences Networked, Parallel and Distributed Computing
Research subject
Computer Science
Identifiers
urn:nbn:se:mdh:diva-73834 (URN)10.1109/ETFA65518.2025.11205571 (DOI)2-s2.0-105021799407 (Scopus ID)979-8-3315-5383-8 (ISBN)
Conference
30th IEEE International Conference on Emerging Technologies and Factory Automation (ETFA)
Funder
Knowledge FoundationVinnova
Note

© 2025 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, including reprinting/republishing for advertising or promotional purposes, creating new collective works for resale or redistribution to servers or lists, or reuse of any copyrighted components of this work in other works.

This is the author’s accepted version of the article:K. Ekrad, I. A. Vadillo, B. Johansson, S. Mubeen and M. Ashjae, “A Methodology to Map Industrial Automation Traffic to TSN Traffic Classes,,” in Proc. 2025 IEEE 30th Int. Conf. on Emerging Technologies and Factory Automation (ETFA), 2025. DOI: 10.1109/ETFA65518.2025.11205571 

Available from: 2025-10-27 Created: 2025-10-27 Last updated: 2026-02-16Bibliographically approved
Dust, L., Gu, R., Mubeen, S., Ekström, M. & Seceleanu, C. (2025). A model-based approach to automation of formal verification of ROS 2-based systems. Frontiers in Robotics and AI, 12, Article ID 1592523.
Open this publication in new window or tab >>A model-based approach to automation of formal verification of ROS 2-based systems
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2025 (English)In: Frontiers in Robotics and AI, E-ISSN 2296-9144, Vol. 12, article id 1592523Article in journal (Refereed) Published
Abstract [en]

Formal verification of robotic applications, particularly those based on ROS 2, is desirable for ensuring correctness and safety. However, the complexity of formal methods and the manual effort required for model creation and parameter extraction often hinder their adoption. This paper addresses these challenges by proposing a model-based methodology that automates the formal verification process using model-driven engineering techniques. We introduce a methodology which can be applied as a toolchain that automates the initialization of formal model templates in UPPAAL using system parameters derived from ROS 2 execution traces generated by the ROS2_tracing tool. The toolchain employs four model representations based on custom Eclipse Ecore metamodels to capture both structural and verification aspects of ROS 2 systems. The methodology supports both implemented and conceptual systems and enables iterative verification of timing and scheduling parameters through model-to-model and model-to-text transformations. A proof-of-concept implementation demonstrates the feasibility of the proposed approach. The designed toolchain supports verification using two types of UPPAAL models: one for individual node verification (e.g., callback latency and buffer overflow) and another for end-to-end latency analysis of ROS 2 processing chains. Experiments conducted on two implemented and one conceptual ROS 2 systems validate the correctness and adaptability of the toolchain. The results show that the toolchain can automate parameter extraction and model generation. The proposed methodology modularizes the verification process, allowing domain experts to focus on their areas of expertise. It targets to enhances traceability and reusability across different verification scenarios and formal models. The approach aims to make formal verification more accessible and practical to robotics developers.

Place, publisher, year, edition, pages
Frontiers Media SA, 2025
National Category
Computer Sciences Robotics and automation
Identifiers
urn:nbn:se:mdh:diva-73778 (URN)10.3389/frobt.2025.1592523 (DOI)001539390800001 ()40740586 (PubMedID)2-s2.0-105012437361 (Scopus ID)
Available from: 2025-10-20 Created: 2025-10-20 Last updated: 2026-03-17Bibliographically approved
Satka, Z., Ashjaei, S. M., Nord, J., Mayta, W. R., Nordin, D., Ragnarsson, D. & Mubeen, S. (2025). Bridging TSN and 5G networks: Prototype design and evaluation for real-time embedded systems. Journal of systems architecture, 168, Article ID 103531.
Open this publication in new window or tab >>Bridging TSN and 5G networks: Prototype design and evaluation for real-time embedded systems
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2025 (English)In: Journal of systems architecture, ISSN 1383-7621, E-ISSN 1873-6165, Vol. 168, article id 103531Article in journal (Refereed) Published
Abstract [en]

Integrating Time-Sensitive Networking (TSN) with 5G cellular networks facilitates high-bandwidth, low-latency end-to-end communication in networked embedded systems. An integrated TSN-5G network has the potential to support predictable and deterministic end-to-end communication, as well as to significantly enhance scalability, particularly in industrial automation, by providing flexibility, efficiency, and responsiveness. This paper aims to facilitate the end-to-end (E2E) communication over the integrated TSN-5G networks, by addressing two of the main challenges: (1) design and implementation of an effective TSN-5G gateway that not only ensures an effective forwarding mechanism to translate the traffic among both networks, but also maps the TSN traffic to the corresponding 5G quality-of-service profiles to ensure the timing requirements of highly critical traffic, and (2) establishment of clock synchronization across all network components to support the E2E communication in TSN-5G networks. The paper outlines the design and implementation of a robust TSN-5G gateway that bridges TSN and 5G network architectures, ensuring seamless interoperability between them. We utilize a standalone private 5G network within a controlled lab environment to establish the E2E communication for the TSN-5G network, with a particular emphasizes on analyzing latencies and jitter to provide valuable insights for industrial implementation. Moreover, the gateway facilitates a time synchronization approach, to enable time coordination between network components that supports E2E communication on TSN-5G networks considering the hardware limitation. Our findings indicate that achieving latencies below 20 ms is feasible in an integrated TSN-5G network using the proposed configuration of a private 5G setup with a channel bandwidth of 40 MHz.

Place, publisher, year, edition, pages
Elsevier BV, 2025
Keywords
5g, Heterogeneous Real-time Networks, Networked Embedded Systems, Time Synchronization, Time-sensitive Networking, Tsn, Automation, Gateways (computer Networks), Interactive Computer Systems, Interoperability, Network Architecture, Network Components, Real Time Systems, Synchronization, Wireless Networks, Design And Implementations, End-to-end Communication, Heterogeneous Real-time Network, Prototype Designs, Real Time Network, 5g Mobile Communication Systems, Embedded Systems
National Category
Telecommunications
Identifiers
urn:nbn:se:mdh:diva-73076 (URN)10.1016/j.sysarc.2025.103531 (DOI)001558419400001 ()2-s2.0-105012596105 (Scopus ID)
Available from: 2025-08-20 Created: 2025-08-20 Last updated: 2026-03-23Bibliographically approved
Bujosa Mateu, D., Ashjaei, S. M. & Mubeen, S. (2025). CONAN-TSN: An Integrated Toolchain for CONfiguration and ANalysis of TSN Networks. In: 2025 IEEE 30th International Conference on Emerging Technologies and Factory Automation (ETFA): . Paper presented at 2025 IEEE 30th International Conference on Emerging Technologies and Factory Automation (ETFA) (pp. 1-8). Institute of Electrical and Electronics Engineers (IEEE)
Open this publication in new window or tab >>CONAN-TSN: An Integrated Toolchain for CONfiguration and ANalysis of TSN Networks
2025 (English)In: 2025 IEEE 30th International Conference on Emerging Technologies and Factory Automation (ETFA), Institute of Electrical and Electronics Engineers (IEEE) , 2025, p. 1-8Conference paper, Published paper (Refereed)
Abstract [en]

Time-Sensitive Networking (TSN) has emerged as a key technology for ensuring reliable and deterministic communication in vehicular networks. However, the complexity of evaluating, configuring, and analyzing TSN mechanisms has hindered its widespread adoption. This paper introduces CONAN-TSN, an integrated toolchain designed to address these challenges by providing a comprehensive solution for the configuration, analysis, and evaluation of TSN networks. CONAN-TSN includes tools for traffic generation, traffic mapping, scheduling, and timing analysis, enabling seamless integration and practical implementation of TSN in vehicular systems. The toolchain’s effectiveness is demonstrated through its application to an industrial use case, showcasing its ability to enhance network schedulability and performance. The results highlight CONAN-TSN’s potential to bridge the gap between theoretical benefits and real-world deployment of TSN, offering a valuable resource for researchers and practitioners in the field.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2025
Series
IEEE Conference on Emerging Technologies and Factory Automation, ISSN 1946-0759
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:mdh:diva-74527 (URN)10.1109/etfa65518.2025.11205713 (DOI)2-s2.0-105021833294 (Scopus ID)979-8-3315-5383-8 (ISBN)
Conference
2025 IEEE 30th International Conference on Emerging Technologies and Factory Automation (ETFA)
Funder
Knowledge Foundation
Available from: 2025-11-25 Created: 2025-11-25 Last updated: 2026-02-16Bibliographically approved
Abdi, S., Ashjaei, S. M. & Mubeen, S. (2025). Deadline-constrained security-aware workflow scheduling in hybrid cloud architecture. Future Generation Computer Systems, 162, Article ID 107466.
Open this publication in new window or tab >>Deadline-constrained security-aware workflow scheduling in hybrid cloud architecture
2025 (English)In: Future Generation Computer Systems, ISSN 0167-739X, E-ISSN 1872-7115, Vol. 162, article id 107466Article in journal (Refereed) Published
Abstract [en]

A hybrid cloud is an efficient solution to deal with the problem of insufficient resources of a private cloud when computing demands increase beyond its resource capacities. Cost-efficient workflow scheduling, considering security requirements and data dependency among tasks, is a prominent issue in the hybrid cloud. To address this problem, we propose a mathematical model that minimizes the monetary cost of executing a workflow and satisfies the security requirements of tasks under a deadline. The proposed model fulfills data dependency among tasks, and data transmission time is formulated with exact mathematical expressions. The derived model is a Mixed-integer linear programming problem. We evaluate the proposed model with real-world workflows over changes in the input variables of the model, such as the deadline and security requirements. This paper also presents a post-optimality analysis that investigates the stability of the assignment problem. The experimental results show that the proposed model minimizes the cost by decreasing inter-cloud communications for dependent tasks. However, the optimal solutions are affected by the limitations that are imposed by the problem constraints. 

Place, publisher, year, edition, pages
Elsevier B.V., 2025
Keywords
Cost minimization, Hybrid cloud, Mixed integer linear programming, Sensitivity analysis, Workflow scheduling, Cloud computing architecture, Combinatorial optimization, Cost benefit analysis, Cryptography, Integer programming, Data dependencies, Hybrid clouds, Integer Linear Programming, Mixed integer linear, Security requirements, Security-aware, Work-flows
National Category
Computer Sciences
Identifiers
urn:nbn:se:mdh:diva-68213 (URN)10.1016/j.future.2024.07.044 (DOI)001295842500001 ()2-s2.0-85201083709 (Scopus ID)
Available from: 2024-08-21 Created: 2024-08-21 Last updated: 2026-03-31Bibliographically approved
Berisa, A., Kraljušić, B., Zahirovic, N., Ashjaei, S. M., Daneshtalab, M., Sjödin, M. & Mubeen, S. (2025). Experimental Evaluation of a CAN-to-TSN Gateway Implementation. In: : . Paper presented at 2025 28th International Symposium on Real-Time Distributed Computing, ISORC 2025 (pp. 153-164). Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Experimental Evaluation of a CAN-to-TSN Gateway Implementation
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2025 (English)Conference paper, Published paper (Refereed)
Abstract [en]

The increasing complexity of modern embedded systems highlights the limitations of Controller Area Network (CAN) in terms of transmission speed and scalability. The IEEE Time-Sensitive Networking (TSN) task group developed a set of standards to enhance switched Ethernet with high bandwidth, low jitter, and deterministic communication. Despite these advances, CAN will likely co-exist with TSN in, e.g., the automotive industry due to factors such as cost-effectiveness and legacy of CAN. This paper presents an experimental evaluation of a CAN-toTSN gateway implementation, focusing on the impact of different forwarding and scheduling strategies on network performance. We analyze various queuing techniques and scheduling mechanisms in a realistic experimental setup and assess their impact on end-to-end delay and TSN bandwidth utilization. The evaluation results demonstrate that encapsulating only a single CAN frame within a TSN frame effectively minimizes the end-to-end delay of CAN frames, in particular when a high-speed TSN network is used. Furthermore, we perform a comparative evaluation of the Time-Aware Shaper (TAS) and Weighted Round Robin (WRR) mechanisms in the TSN network. Interestingly, WRR leads to lower delays for CAN frames in the TSN network compared to TAS, which we attribute to the lack of synchronization between CAN and TSN.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2025
Keywords
Automotive embedded systems, CAN, Controller Area Network, Gateway, Time-sensitive Network, TSN
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:mdh:diva-73869 (URN)10.1109/ISORC65339.2025.00029 (DOI)2-s2.0-105019235065 (Scopus ID)9798331599843 (ISBN)
Conference
2025 28th International Symposium on Real-Time Distributed Computing, ISORC 2025
Available from: 2025-10-29 Created: 2025-10-29 Last updated: 2025-12-03Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0003-3242-6113

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