https://www.mdu.se/

Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used in safety-critical applications, reliability assessment is mandatory to guarantee the correct behavior of DNN accelerators. While fault injection stands out as a well-established practical and robust method for reliability assessment, it is still a very time-consuming process. This paper addresses the time efficiency issue by introducing a novel hierarchical software-based hardware-aware fault injection strategy tailored for systolic array-based DNN accelerators. A Uniform Recurrent Equations system is used for software modeling of the systolic-array core of the DNN accelerators. The approach demonstrates a reduction of the fault injection time up to 3x compared to the state-of-the-art hybrid (software/hardware) hardware-aware fault injection frameworks and more than 2000x compared to RT-level fault injection frameworks without compromising the accuracy from the application level. Additionally, we introduce novel reliability metrics to better evaluate the robustness of a deep neural network system. The performance of the framework is studied on state-of-the-art DNN benchmarks.